TIMER Registers of 8051

This article is about timer registers of 8051.To interface timer with 8051 we need to know the configuration of timer registers.

There are two timers in 8051:

1.Timer 0 

2.Timer 1.

There are two timer registers we need to configured in order to control the operation of the timer and to decide operating mode of the timer.

1.TMOD register(8 bit)

2.TCON register(8 bit)

There are two timer registers we need to load the value of the count.

1.Timer 0 register(16 bit):TH0 and TL0

2.Timer 1 register(16 bit):TH1 and TL1

Timer Register:

In order to provide the required delay to the timer,we need to load the count equivalent to delay in timer.For this purpose timer register is used.For timer 0,timer 0 register is used to load the count.For timer 1,timer 1 register is used to load the count.

Timer 0 register and Timer 1 register are 16 bit timer registers.As 8051 is a 8 bit controller,hence timer register is used as a separate low byte and high byte register.

Timer 0 register is get separated as TH0 register and TL0 register.Timer 1 register is get separated as TH1 register and TL1 register.

Low count is loaded in TL0/TL1 which is 8 bit register and higher count is loaded in TH0/TH1 which is 8 bit register.

TMOD Register:

TMOD register is used to decide operating mode of timer and to decide whether timer will act as a timer or a counter.It is 8 bit register.

Configuration of TMOD  register is as follows:

TMOD Register

GATE :

Gate=1 

Timer 1 operates only if the bit INT1(bar) is set and Timer 0 operates only if the bit INT0(bar) is set.This is used when we want to start and stop the timers externally.

Gate=0 

Timer 1 operates regardless of the state of INT1(bar) and Timer 0 operates regardless of the state of INT0(bar).

C/T(bar) :

C/T(bar)=1 

Timer 1 act as a counter and it counts pulses provided to pin T1 of 8051.Timer 0 act as a counter and it counts pulses provided to pin T0 of 8051.

C/T(bar)=0 

Timer 1 and Timer 0 act as a timer.

MODE 1 and MODE 0:

Timer 1 and Timer 0 can be operated in four different modes as shown in figure below:

Operating modes of Timer 1 and Timer 0

Mode 0 : 

It is 13 bit timer mode.As it is 13 bit mode,in this mode we can able to used only 5 bit of TL0/TL1 register and 8 bit of TH0/TH1 register.This mode is able to load the value from 0000h to 1fffh.

Mode 1 : 

It is 16 bit timer mode. So in this mode we can able to load the value from 0000h to ffffh.This is widely used mode.

Mode 2 : 

It is 8 bit auto reload mode.This mode is able to load the value from 00h to ffh.

In mode 2 ,timer register TL0/TL1 is used  as a timer and timer register TH0/TH1 is used to load the count.In this mode timer starts counting from the value stored in TH0/TH1 register and TL0/TL1 register  act as a  timer.

Suppose the value stored in TH0/TH1 register is 60 then TL0/TL1 register starts counting from 60 up to 255. When the count reaches to 255 then TL0/TL1 register again get loaded with the value 60 and it again starts counting.

As this mode is auto reload mode hence it will automatically take the value from TH0/TH1 register and TL0/TL1 register starts counting from that value.This mode is widely used in serial communication to set the baud rate.

Mode 3 :

It is split timer mode.This mode is not widely used.

TCON  Register (Timer control register):

TCON register is used to control the operation of timer or counter.It is 8 bit register.

Configuration of TCON register is as follows:

TCON Register

Timer 1 overflow flag(TF1):

Set when timer get overflow from ffffh to 0000h.When this bit is set it activates the interrupt and it is set by the software.Interrupt get activated only if D7 bit and D3 bit of IE (Interrupt Enable) register are set.It is cleared automatically when interrupt is vectored to location 001B h.
 1 = set
 0 =clear

Timer run bit 1(TR1):

 1= Timer 1 is turned on
 0= Timer 1 is turned off

Timer 0 overflow flag(TF0):

Set when timer get overflow from ffffh to 0000h.When this bit is set it activates the interrupt and it is set by the software.Interrupt get activated only if D7 bit and D1 bit of IE register are set.It is cleared automatically when interrupt is vectored to location 000B h.

 1 = set
 0 =clear

Timer run bit 0(TR0):

1= Timer 0 is turned on
0= Timer 0 is turned off

IT0 and IT1 :

These bits are used to decide triggering type of external hardware interrupt pins INT0(bar) and INT1(bar) respectively.It can be set through software.

1 = operates in edge triggered mode
0 = operates in level triggered mode.

IE1 and IE0:

These bits are used to keep track of edge triggered interrupt only.It is possible when IT0 and IT1 bits are not low level triggered.

Whenever 8051 detects high to low edge transition on INT1(bar),it sets the IE1 bit and interrupt is vectored to location 0013h.After executing the ISR,IE1 is cleared automatically when RETI instruction is executed.Whenever it is executing the ISR no edge transition get detected by 8051,hence it prevents any interrupt inside the interrupt.

Whenever 8051 detects high to low edge transition on INT0(bar),it sets the IE0 bit and interrupt is vectored to location 0003h.After executing the ISR,IE0 is cleared automatically when RETI instruction is executed.Whenever it is executing the ISR no edge transition get detected by 8051,hence it prevents any interrupt inside the interrupt.

1 = set
0 =clear

NOTE:

1.Whenever TH0/TH1 is used it means that TH0 is considered when Timer 0 is used and TH1 is considered when Timer 1 is used.Same is applicable for TL0/TL1.
2.The signals which are referred as bar are active low signals.For ex: INT0(bar)